The Flaw in Apple’s Plan to Make Chips in Arizona
No matter what happens with TSMC's high-profile facility in Phoenix, many cutting-edge chips it produces for Apple, Nvidia, AMD and Tesla will still require assembly in Taiwan
In December last year, Apple CEO Tim Cook traveled to Phoenix, stood with President Joe Biden in front of a high-profile factory Taiwan Semiconductor Manufacturing Co. was constructing and said the facility would produce chips for the iPhone maker. The comments seemed to commit Apple to aid Biden’s goal of lessening reliance on foreign chipmaking facilities—namely in Taiwan, which has been under threat of a takeover or blockade by China.
But Cook avoided speaking an uncomfortable truth: The Arizona factory—which has been a focal point of the Biden plan and will cost $40 billion to build—will do little to make the U.S. self-reliant in chips. That’s because many advanced chips made in Arizona for Apple or other customers such as Nvidia, AMD and Tesla will still require assembly in Taiwan in a process known as packaging, according to interviews with multiple TSMC engineers and former Apple employees.
THE TAKEAWAY
• High-profile plant in Arizona won’t change Apple’s dependency on Taiwan
• iPhone and Nvidia H100 chips depend on Taiwan for final assembly
• TSMC has no plans to build an advanced packaging facility in the U.S.
TSMC has no plans to build a packaging facility in Arizona or elsewhere in the U.S., mainly due to the high costs associated with such a project, the TSMC employees said.
The revelation shows how TSMC’s Arizona facility—which will employ 4,500 people across two factories when it begins mass production in 2025—may serve to score political points but doesn’t reduce America’s reliance on Taiwan.
“The TSMC Arizona fab is effectively a paperweight in any geopolitical tension or war [with China over Taiwan] due to the fact that it still requires sending the chips back to Taiwan for packaging,” said Dylan Patel, chief analyst at SemiAnalysis, a semiconductor research firm.
TSMC’s inability to fully assemble chips for Apple and others in the U.S. shows how difficult it will be for Biden to bring chip manufacturing to the U.S. without completely reshaping the entire supply chain for semiconductors, which is heavily concentrated in Asia. Taiwan occupies an especially important position in the field and is a major reason the West is concerned about China’s repeated threats to take over or blockade the island territory, which has long operated independently.
Cook has said Apple would be TSMC’s largest customer at the Arizona facility but hasn’t specified which chips would be made there or how many. Packaging for the companies’ less important chips, including those for the iPad and MacBooks, could be handled outside Taiwan.
Nvidia, AMD and Tesla also plan to use the Arizona facility to make chips, though they haven’t indicated which ones either. But their most advanced chips for artificial intelligence—including Nvidia’s coveted H100 chip—still rely on packaging techniques that TSMC only does in Taiwan, TSMC employees say. TSMC is spending billions of dollars to expand its capacity for packaging these chips in Taiwan in response to exploding demand for AI computing.
Spokespeople for Apple, Nvidia and TSMC declined to comment. Tesla CEO Elon Musk didn’t respond to a request for comment.
‘Huge Expenditure’
When or whether TSMC will bring cutting-edge chip packaging to the U.S. is a matter that depends on cost. TSMC’s factories in Arizona won’t produce enough chips to justify the price of building an advanced packaging facility there, said Paul Triolo, senior vice president for China at consultancy DGA-Albright Stonebridge Group.
“Building this type of facility is a huge expenditure of [capital], time, and effort, and it does not seem likely that TSMC will want to do this anytime soon in the desert in Arizona, particularly given all the problems the firm has encountered with construction, costs and personnel so far,” he said.
Those problems prompted TSMC to push back the start date by a year, to 2025, after it said in July it was struggling to find enough skilled workers to construct the facility.
Chip analysts such as Triolo, as well as industry groups such as the Institute of Printed Circuits, have said Washington hasn’t done enough to encourage companies involved in packaging to move operations to the U.S., where only 3% of the world’s advanced packaging occurs.
The U.S. government is aware of the advanced packaging gap. The Creating Helpful Incentives to Produce Semiconductors and Science Act, a law the U.S. passed last year to earmark roughly $52 billion in subsidies for chip firms that build factories in the U.S., called for the creation of a National Advanced Packaging Manufacturing Program. That program will receive at least $2.5 billion in funding from the CHIPS Act this year, which IPC said showed that packaging is “not being clearly prioritized.”
A spokesperson for the U.S. Department of Commerce, which played a key role in creating the CHIPS Act, wouldn’t comment on potential applicants seeking funding for advanced packaging facilities but pointed to a February speech by Secretary Gina Raimondo in which she said the U.S. will develop multiple high-volume advanced packaging facilities and become a global leader in the field.
But without considerably more subsidies, it isn’t clear how advanced packaging firms would be able to justify the high costs of building facilities in the U.S. versus in Asia, Triolo said.
Chip packaging involves encapsulating the die in protective materials and placing a chip’s components as close together as possible to reduce the distance signals must travel between them. Cutting-edge packaging has become important for boosting a chip’s performance as the industry bumps up against the physical limits of how many transistors can be etched on a chip wafer. TSMC and another Taiwanese company, ASE Group, handle a lot of the world’s most advanced packaging on the island, while Samsung Electronics has important facilities in South Korea, and Intel—a pioneer of the field—is setting up a large advanced packaging facility in Malaysia.
But the other companies can’t hold a candle to TSMC in this area. The firm initially developed the advanced packaging used by the iPhone for another customer, Qualcomm, which ultimately didn’t use the technology, according to current and former TSMC employees. Instead, Apple has been using it for the main chip in the iPhone since as early as 2016.
Today, the iPhone’s main chip still uses the advanced packaging method developed by TSMC, called Integrated Fan-out Package on Package, also referred to as InFO_PoP. The method places the iPhone’s memory on top of its processor, making the overall chip smaller and thinner to improve its power efficiency and performance.
Aerial photos of the TSMC construction site in July. Photos via YouTube/Precision Aerial Solutions
Apple’s Discount
Former Apple and TSMC employees said Apple pays a lot to use TSMC’s advanced packaging and Apple is the only customer using TSMC’s method at high volumes. (The Information previously reported that Google plans to use the same TSMC advanced packaging method for its Pixel phone chips starting in 2025.)
Still, Apple gets a significant discount on TSMC’s packaging, as it’s bundled with a commercial contract with TSMC to make processor dies, which gives Apple uniquely favorable terms, The Information previously reported. Apple also uses TSMC’s advanced packaging for the Apple Watch and its most advanced Mac desktops.
As chip packaging gets more advanced, TSMC customers such as Apple and Nvidia will find it harder to disentangle themselves from facilities in Taiwan, said Patel of SemiAnalysis. That’s because TSMC always develops its newest manufacturing and packaging processes close to home, where costs are lower and talent is easier to find.
That means TSMC’s future advanced packaging methods, which Apple is considering using, will almost certainly be offered only in Taiwan. One method Apple is evaluating for future MacBooks and Macs, Small Outline Integrated Circuit, breaks up processor dies into even smaller pieces and stacks them on top of one another, making the overall chip smaller while also increasing its performance, according to a TSMC employee with direct knowledge of the matter.